The fabrication of ICs is accomplished in large volume production by a process called photolithography. Stated simply, this process uses a monochromatic light source of specified wavelength to expose (harden) a photosensitive material covering a silicon wafer. The monochromatic light shines through a chromium stencil (mask) that contains the circuit pattern to be written on the silicon wafer. The shadow of the circuit pattern passes through a complex optical system designed to de-magnify the image and focus it on the silicon wafer. After a short exposure time of about one-quarter to one-half second, the photo-resist chemical hardens effectively transferring the de-magnified image of the mask onto the wafer. The patterns for the various layers of a multi-layer IC are sequentially exposed. The area of a 300 mm diameter wafer is large enough to hold some 176 large scale, 20 mm×20 mm integrated circuit writing fields. With an exposure time on the order of one-quarter to one-half second per IC pattern, the entire wafer can be exposed in 44 to 88 seconds yielding a throughput of approximately 41 to 82 wafers per hour.
The need to improve switching speed and reduce power consumption has driven IC manufacturers to produce ICs with increased component density. This requires increased optical resolution in the photolithography process. It is well known in the manufacture of ICs that the density of components may soon reach a physical limit due to the diffraction effects of light. Diffraction is defined as the apparent bending of light waves around small obstacles and the spreading out of light waves transiting small openings. Diffraction distortion gives rise to a blurring of the shadow of the edge of an object or aperture. In optics, diffraction effects become important when the wavelength of the light used is about the same size as the object being imaged. For example, a standard light optical microscope has a resolving power of approximately 500 nm which is approximately equal to the wavelength of blue visible light. As higher and higher component densities are achieved, the size of individual circuit features decreases. This requires the use of shorter and shorter wavelengths of light to lower diffraction limits. State of the art photolithography machines in use today utilize UV light at a wavelength of 248 nm and employ a costly krypton-fluoride eximer laser as the light source. When combined with phase shifting masks and off-axis optics, the minimum line width that can be written on a wafer is approximately 90 nm. For the next generation of ICs, wavelengths of 193 and 157 nm (extreme UV) such as provided by argon-fluoride lasers will be used to provide line widths possibly down to 45 nm. However, the use of these wavelengths may not be practical due to problems arising from the opaqueness of the conventional glass materials making up the optical lenses. More exotic and costly materials, or the use of totally reflective optics, may be necessary. At a wavelength of 193 nm and below, immersion optics may be used in photolithography equipment to provide additional improvement in resolution. In immersion optics, the air space between the final objective lens and the silicon wafer is replaced by a liquid, such as water, having a higher index of refraction. Since the diffraction limit is also a function of the difference in index of refraction between optical elements and the surrounding medium, immersion optics gives rise to an additional level of improvement in resolution. However, this approach requires resolving not only the opaqueness problem, but also the additional problems associated with a liquid in contact with the silicon. As the wavelength of the incident radiation approaches the X-ray spectrum of approximately 20 nm, standard optical materials will no longer refract or reflect X-rays in the usual manner since the lens materials are now highly transparent at these shorter wavelengths. X-ray lithography devices may be required to use proximity printing techniques which forces the wafer to be in very close proximity to the mask. These difficulties have become technologically insurmountable as well as cost prohibitive.
A well known method for overcoming the diffraction limits associated with the photolithographic process involves replacing the UV light with an electron beam to write the IC pattern. Although the electron has an associated quantum wavelength, it is much shorter than the wavelength of even deep UV light or X-rays and will not cause a diffraction problem even at the 35 nm line width needed in the future. For lithography, the resolution limit for an electron beam is likely not due to its inherent diffraction limit, but rather is due to electron scattering in the resist material and is estimated to be approximately 10 nm. This is well below that needed for the foreseeable future of IC devices. Conventional electron beam lithography devices generally consist of a single electron beam that is focused and magnetically scanned across the silicon wafer. By turning the electron beam on and off at the appropriate time, the IC pattern can be formed much like the video image produced by scanning an electron beam across the phosphor screen of a cathode ray tube (CRT). The electron optics in these devices are very complex and similar to the beam columns of electron microscopes. Indeed, many e-beam lithography machines are modified electron microscopes. Although these electron beam devices have the ability to focus the electron beam spot far smaller than that needed for IC production, they suffer from three major problems, i.e., low throughput, high beam deflection sensitivity, and spot size enlargement due to deflection distortion. It can be easily calculated that the dwell time of an electron beam required on each pixel of an IC pattern is on the order of 1×10−7 seconds for proper exposure of the electron resist. The next generation of IC patterns will have a feature size approaching 65 nm or a resolution of 15,384 lines per mm (6.0×1010 total pixels in a 16 mm×16 mm IC). This translates to a total writing time on the order of two hours per layer of the IC pattern. In addition, the electron beam column used in conventional systems is very large in size such that only one such column can fit over the area of the wafer and only one chip pattern can be written at a time. Thus, the time to form the roughly 176 ICs on a 300 mm diameter wafer is on the order of several days. This is obviously not compatible with the 41 to 82 wafer/hr level of throughput needed for production. The second problem faced by conventional electron beam writing devices is that of beam positioning. Since the scale of the smallest feature for next generation ICs will be on the order of 65 nm, the positioning accuracy of the electromagnetic scan must be on the order of 10% of the line width, or about 6 nm, in order to guarantee vertical alignment of subsequent IC layers. In these conventional devices the positioning of the beam is controlled by an electromagnetic and/or electro-static deflection system that requires extremely accurate control of voltages and currents. This is a difficult task that can be easily disturbed by external electric or magnetic fields.